Fix endianness of LOAD_ADDRESS command data, add correct PROGRAM_FLASH_ISP/PROGRAM_EEPROM_ISP polling and endpoint bank clearing, add hardware delays/timeouts to the V2 Protocol handler in the AVRISP project.
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@@ -83,7 +83,7 @@ void V2Protocol_DelayMS(uint8_t MS)
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}
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uint8_t V2Protocol_WaitForProgComplete(uint8_t ProgrammingMode, uint16_t PollAddress, uint8_t PollValue,
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uint8_t DelayMS, bool IsFlashMemory, uint8_t ReadMemCommand)
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uint8_t DelayMS, uint8_t ReadMemCommand)
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{
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uint8_t ProgrammingStatus = STATUS_CMD_OK;
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@@ -96,12 +96,6 @@ uint8_t V2Protocol_WaitForProgComplete(uint8_t ProgrammingMode, uint16_t PollAdd
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break;
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case PROG_MODE_WORD_VALUE_MASK:
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case PROG_MODE_PAGED_VALUE_MASK:
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if (IsFlashMemory && (PollAddress & 0x01))
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{
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ReadMemCommand |= READ_WRITE_ODD_BYTE_MASK;
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PollAddress >>= 1;
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}
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TCNT0 = 0;
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do
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@@ -119,6 +113,7 @@ uint8_t V2Protocol_WaitForProgComplete(uint8_t ProgrammingMode, uint16_t PollAdd
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case PROG_MODE_WORD_READYBUSY_MASK:
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case PROG_MODE_PAGED_READYBUSY_MASK:
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ProgrammingStatus = V2Protocol_WaitWhileTargetBusy();
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break;
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}
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return ProgrammingStatus;
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@@ -126,8 +121,6 @@ uint8_t V2Protocol_WaitForProgComplete(uint8_t ProgrammingMode, uint16_t PollAdd
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uint8_t V2Protocol_WaitWhileTargetBusy(void)
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{
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uint8_t ResponseByte;
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TCNT0 = 0;
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do
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@@ -136,9 +129,8 @@ uint8_t V2Protocol_WaitWhileTargetBusy(void)
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SPI_SendByte(0x00);
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SPI_SendByte(0x00);
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ResponseByte = SPI_ReceiveByte();
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}
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while ((ResponseByte & 0x01) && (TCNT0 < TARGET_BUSY_TIMEOUT_MS));
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while ((SPI_ReceiveByte() & 0x01) && (TCNT0 < TARGET_BUSY_TIMEOUT_MS));
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if (TCNT0 >= TARGET_BUSY_TIMEOUT_MS)
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return STATUS_RDY_BSY_TOUT;
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